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MPC8280 데이터시트(PDF) 600 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 600 Page - Freescale Semiconductor, Inc |
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600 / 1386 page ![]() Serial Interface with Time-Slot Assigner MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 15-22 Freescale Semiconductor Figure 15-16 shows the effects of changing FE when CE = 1 with no frame sync delay. Figure 15-16. Falling Edge (FE) Effect When CE = 1 and xFSD = 00 L1TXD L1ST L1SYNC L1CLK (Bit-0) (On Bit-0) xFSD=00 (FE=0) CE=1 The L1ST is Driven from Sync. Data is Driven from Clock Low. L1TXD L1ST L1SYNC (Bit-0) (On Bit-0) (FE=0) L1ST is Driven from Clock High. L1TXD L1ST L1SYNC (Bit-0) (On Bit-0) (FE=1) Both Data Bit-0 and L1ST are Driven from Sync. Rx Sampled Here Rx Sampled Here L1TXD L1ST L1SYNC (Bit-0) (On Bit-0) (FE=1) L1ST and Data Bit-0 is Driven from Clock Low. |
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