MPC8280 datasheet(714/1386 Pages) FREESCALE

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SCC UART Mode

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

21-8

Freescale Semiconductor

If the received control character is not rejected, it is written to the receive buffer. The receive buffer is then

automatically closed to allow software to handle end-of-message characters. Control characters that are

not part of the actual message, such as XOFF, can be rejected. Rejected characters bypass the receive

buffer and are written directly to the received control character register (RCCR), which triggers maskable

interrupt.

The 16-bit entries in the control character table support control character recognition. Each entry consists

of the control character, a valid bit (end of table), and a reject bit. See Figure 21-3.

Table 21-4 describes the data structure used in control character recognition.

Offset 1

0x50

—

CHARACTER1

0x52

—

CHARACTER2

•

0x5E

—

CHARACTER8

0x60

—

RCCM

0x62

—

RCCR

1 From SCCx base address

Figure 21-3. Control Character Table

Table 21-4. Control Character Table, RCCM, and RCCR Descriptions

Offset

Bits

Name

Description

0x50–

0x5E

End of table. In tables with eight control characters, E is always 0.

0 This entry is valid.

1 The entry is not valid and is not used.

Reject character.

0 A matching character is not rejected but is written into the Rx buffer, which is

then closed. If RxBD[I] is set, the buffer closing generates a maskable interrupt

through SCCE[RX]. A new buffer is opened if more data is in the message.

1 A matching character is written to RCCR and not to the Rx buffer. A maskable

interrupt is generated through SCCE[CCR]. The current Rx buffer is not closed.

2–7

—

Reserved

8–15

CHARACTERn

Control character values 1–8. Defines control characters to be compared to the

incoming character. For characters smaller than 8 bits, the most significant bits

should be zero.

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