MPC8280 datasheet(1130/1386 Pages) FREESCALE

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ATM AAL2

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

33-24

Freescale Semiconductor

—

Reserved, should be cleared during initialization.

DTB

Data buffer bus selection.

0 Reside on the 60x bus.

1 Reside on the local bus.

BIB

Bus selection for the BDs, interrupt queues, CID mapping table, RxQDs, and the free

buffer pool.

0 Reside on the 60x bus.

1 Reside on the local bus.

8–9

—

Reserved, should be cleared during initialization.

SEGF

OAM F5 segment filtering

0 Do not send cells with PTI=100 to the raw cell queue.

1 Send cells with PTI=100 to the raw cell queue.

ENDF

OAM F5 end-to-end filtering

0 Do not send cells with PTI=101 to the raw cell queue.

1 Send cells with PTI=101 to the raw cell queue.

—

Reserved, should be cleared during initialization.

MAP

CID mapping table memory location select

0 Resides in the dual-port RAM.

1 Resides in external memory.

14–15

INTQ

Assigns one of the four available interrupt queues to this ATM channel number.

0x02

0–11

—

Reserved, should be cleared during initialization.

NoSTF

No STF byte.

0 Normal AAL2 cell structure.

1 The cell does not include the STF byte. In this mode each cell starts with a packet

and contains only whole packets (no split or part).

13–15

AAL

AAL type

000

AAL0 —Reassembly with no adaptation layer

001

AAL1 —ATM adaptation layer 1 protocol

010

AAL5 —ATM adaptation layer 5 protocol

100

AAL2 —ATM adaptation layer 2 protocol

101

AAL1_CES. Refer to Chapter 32, “ATM AAL1 Circuit Emulation Service.”

All others reserved.

Table 33-6. AAL2 Protocol-Specific RCT Field Descriptions (continued)

Offset

Bits

Name 1

Description

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