MPC8280 datasheet(1279/1386 Pages) FREESCALE

부품명	MPC8280

상세설명	PowerQUICC??II Family Reference Manual

PDF	1386 Pages

Scroll/Zoom	100%

제조업체	FREESCALE [Freescale Semiconductor, Inc]

홈페이지	http://www.freescale.com

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1279 / 1386 page

FCC HDLC Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

37-17

Table 37-10 describes FCCS bits.

Table 37-10. FCCS Register Field Descriptions

Bits

Name

Description

0–4

—

Reserved, should be cleared.

Flags. While FG is cleared, each time a new bit is received the most recently received 8 bits are

examined to see if a flag is present. FG is set as soon as an HDLC flag (0x7E) is received on the

line. Once FG is set, it remains set at least 8 bit times while the next 8 bits of input data are

examined. If another flag occurs, FG stays set for at least another eight bits. Otherwise, FG is

cleared and the search begins again.

• 0HDLC flags are not currently being received.

• 1HDLC flags are currently being received.

—

Reserved, should be cleared.

Idle status. ID is set when the RXD signal is a logic one for 15 or more consecutive bit times; it is

cleared after a logic zero is received.

• 0The line is busy.

• 1The line is idle.

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