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MPC8280 데이터시트(PDF) 1287 Page - Freescale Semiconductor, Inc |
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MPC8280 데이터시트(HTML) 1287 Page - Freescale Semiconductor, Inc |
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1287 / 1386 page ![]() Serial Peripheral Interface (SPI) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 39-3 39.3.1 The SPI as a Master Device In master mode, the SPI sends a message to the slave peripheral, which sends back a simultaneous reply. A single master MPC8280 with multiple slaves can use general-purpose parallel I/O signals to selectively enable slaves, as shown in Figure 39-2. To eliminate the multimaster error in a single-master environment, the master’s SPISEL input can be forced inactive by selecting port D[19] for general-purpose I/O (PDPAR[DD19] = 0). Figure 39-2. Single-Master/Multi-Slave Configuration To start exchanging data, the core writes the data to be sent into a buffer, configures a TxBD with TxBD[R] set, and configures one or more RxBDs. The core then sets SPCOM[STR] in the SPI command register to start sending data, which starts once the SDMA channel loads the Tx FIFO with data. The SPI then generates programmable clock pulses on SPICLK for each character and simultaneously shifts Tx data out on SPIMOSI and Rx data in on SPIMISO. Received data is written into a Rx buffer using the next available RxBD. The SPI keeps sending and receiving characters until the whole buffer is sent or an error occurs. The CP then clears TxBD[R] and RxBD[E] and issues a maskable interrupt to the interrupt controller in the SIU. When multiple TxBDs are ready, TxBD[L] determines whether the SPI keeps transmitting without SPCOM[STR] being set again. If the current TxBD[L] is cleared, the next TxBD is processed after data from the current buffer is sent. Typically there is no delay on SPIMOSI between buffers. If the current TxBD[L] is set, sending stops after the current buffer is sent. In addition, the RxBD is closed after transmission stops, even if the Rx buffer is not full; therefore, Rx buffers need not be the same length as Tx buffers. SPIMOSI SPIMISO SPICLK SPISEL Slave 0 SPIMISO SPICLK SPISEL Slave 1 Slave 2 Master SPI SPIMOSI SPIMISO SPICLK SPISEL SPIMOSI The SPISEL SPICLK SPIMISO SPIMOSI MPC8280 decoder can be either internal or external logic. |
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