TMPR3916 datasheet(57/225 Pages) TOSHIBA

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Chapter 2 Memory Controller (MC)

Preliminary

2-8

2.5.2

SDRAM Controller Function / Bank Interleaving

The SDRAMC module functions as an advanced DRAM controller for synchronous DRAM. The

TMPR3916 SDRAMC is “advanced” compared to regular SDRAM controllers in the way that it is

capable of handling two different MCU busses at the same time.

SDRAM memory devices are usually organized in 4 different banks. All of these banks contain a

high-speed static RAM memory buffer, which allows fast sequential access once a DRAM memory row

has been sensed into these buffers. The sensing of the DRAM memory row and the rewriting of the

sensed row are major contributors to the total duration of each memory access.

The following picture shows the benefits of the dual-bus structure:

Single G-Bus SDRAM Controller

Command

(Output)

GBusA

Start

GBus A

Data

ACTV

NOP

READ

NOP

PCHG

NOP

READ

NOP

PCHG

ACTV

NOP

QA1

QA2

QA3

QB1

QB2

QB3

QB4

QA4

NOP

Command

(Output)

GBusA

Start

GBus A

Data

GBus B

Start

GBus B

Data

Dual G-Bus SDRAM Controller

QA2

QA3

QB1

QB2

QB3

QB4

QA4

ACTV

NOP

READ

NOP

PCHG

READ

PCHG

ACTV

QB1

QB2

QB3

QA4

NOP

QA2

QA3

QB1

QB2

QB3

QB4

QA4

NOP

QA1

QB4

QA1

QA2

QA3

MCU Access

Video/DMA Access

MCU Access

Video/DMA Access

Figure 2.5.1 Benefits of Dual-Bus Structure

A regular SDRAM memory controller with only one MCU-bus interface will connect both the MCU

and the video-controller on one bus. By transferring the bus-ownership both components access the

external DRAM memory. Typically, the SDRAM controller is able to work with only one address at the

same time. It will not know the address for the next access before the previous transfer has been

completed.

A dual G-Bus memory controller always knows the state and address of both busses. Therefore, it is

possible to work with both addresses at the same time.

The dual G-Bus structure can only be effectively used, if the following condition is met:

The two busses should utilize either different banks of the same channel or two different channels.

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