| 전자부품 데이터시트 검색엔진 |
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TMPR3927 데이터시트(PDF) 62 Page - Toshiba Semiconductor |
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TMPR3927 데이터시트(HTML) 62 Page - Toshiba Semiconductor |
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62 / 512 page ![]() Chapter 4 Address Mapping 4-2 Figure 4.1.1 Memory Address Map (TLB off) Figure 4.1.2 Memory Address Map (TLB on) 0xFFFF_FFFF 0xC000_0000 0xA000_0000 0x8000_0000 Physical address space Virtual address space (Reserved area) kseg2 kseg1 kseg0 kuseg 1024 MB 2048 MB Access prohibited 512 MB 0xFFFF_FFFF 0xC000_0000 0x4000_0000 0x2000_0000 0x0000_0000 Virtual address space Physical address space Page mapping Kernel (uncacheable) (kseg1) Kernel (reserved) Kernel (cacheable) (kseg2) Kernel/user (cacheable) (kuseg) 64 KB 16 MB (reserved) 3568 MB Reserved Kernel boot and I/O 512 MB cacheable/ uncacheable 0xFFFF FFFF 0xFFFF 0000 0xFF00 0000 0x4000 0000 0x2000 0000 0x1FFF FFFF 0x0000 0000 0xFFFF FFFF 0xFFFF 0000 0xFF00 0000 0xC000 0000 0xA000 0000 0x8000 0000 0x0000 0000 Kernel (cacheable) (kseg0) |
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