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TMPR4937 데이터시트(PDF) 240 Page - Toshiba Semiconductor

부품명 TMPR4937
상세설명  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4937 데이터시트(HTML) 240 Page - Toshiba Semiconductor

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Chapter 9 SDRAM Controller
9-24
Bit
Mnemonic
Field Name
Description
Read/Write
8
SEI
Single-Bit Error
Interrupt Enable
Single-Bit Error Interrupt Enable (Default: 0)
Specifies whether to generate an interrupt during a single-bit error.
0: Disable
1: Enable
R/W
7:1
—
—
Reserved
⎯
0
ECCE
ECC Enable
ECC Enable (Default: 0)
Specifies whether to enable the ECC/Parity function. When disabled, the
ECC function will not operate even if the ECC Parity Mode field
(SDCCRn.ECC) selects the ECC/Parity Mode.
0: Disable
1: Enable
R/W
Figure 9.4.4 ECC Control Register (2/2)



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