TMP86CS25AFG datasheet(69/194 Pages) TOSHIBA

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Page 59

TMP86CS25AFG

5.6 Port P7 (P77 to P70)

Port P7 is an 8-bit input/output port which is also used as an external interrupt input, a divider output a segment

pins of LCD.

When used as input port or a secondary function pins, the respective output latch (P7DR) should be set to “1”.

During reset, the P7DR is initialized to “1”.

When used as a segment pins of LCD, the respective bit of P7LCR should be set to “1”. When used as an output

port, the respective P7LCR bit should be set to “0”.

P7 port output latch (P7DR) and P7 port terminal input (P7PRD) are located on their respective address.

When read the output latch data, the P7DR should be read and when read the terminal input data, the P7PRD reg-

ister should be read. If the terminal input data which is configured as LCD segment output is read, unstable data is

read.

Figure 5-7 Port 7

Note: With ports assigned as MUL6 to MUL0, assigned pins can be switched by the multi function register (MULSEL). The

assigned functions are shown in “5.7 Multi Function Register”.

P7DR

(0007H)

R/W

543

P77

COM15

SCK1

P76

COM14

SO0

P75

COM13

SI1

P74

COM12

MUL3

P73

COM11

MUL2

P72

COM10

MUL1

P71

COM9

MUL0

P70

COM8

(Initial value: 1111 1111)

P7LCR

(002BH)

543

(Initial value: 0000 0000)

P7LCR

Port P7/segment output select

(set for each bit individually)

0: P7 input/Output port

1: segment output

R/W

P7PRD

(000DH)

Read only

543

P77

P76

P75

P74

P73

P72

P71

P70

Output latch

P7LCRi

Data output (P7DR)

Output latch data (P7DR)

LCD data output

Control input

Terminal input (P7PRD)

STOP

OUTEN

Control output

P7LCRi input

P7i

Note: i = 7 to 0

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