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PCM1774 데이터시트(PDF) 12 Page - Texas Instruments

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부품명 PCM1774
상세설명  16-Bit, Low-Power Stereo Audio DAC With Analog Mixing, Line and Headphone Outputs
PDF  49 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

PCM1774 데이터시트(HTML) 12 Page - Texas Instruments

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DESCRIPTION OF OPERATION
System Clock Input
t
w(SCKH)
SCKI
t
w(SCKL)
0.7V
IO
0.3V
IO
T0005-12
Power-On Reset and System Reset
Power On/Off Sequence
PCM1774
SLAS551 – JULY 2007
The PCM1774 can accept clocks of various frequencies without a PLL. They are used for clocking the digital
filters and automatic level control and delta-sigma modulators and are classified as common-audio and
application-specific clocks. Table 2 shows frequencies of the common-audio clock and application-specific clock.
Figure 13 shows the timing requirements for system clock inputs. The sampling rate and frequency of the
system clocks are determined by the settings of register 86 (MSR[2:0]) and register 85 (NPR[5:0]). Note that the
sampling rate of the application-specific clock has a little sampling error. The details are shown in Table 9.
Table 2. System Clock Frequencies
CLOCK
FREQUENCIES
Common-audio clock
11.2896, 12.288, 16.9344, 18.432 MHz
Application-specific clock
12, 13, 13.5, 24, 26, 27, 19.2, 19.68, 38.4, 39.36 MHz
PARAMETERS
SYMBOL
MIN
UNITS
System-clock pulse duration, high
tw(SCKH)
7
ns
System-clock pulse duration, low
tw(SCKL)
7
ns
Figure 13. System Clock Timing
The power-on-reset circuit outputs a reset signal, typically at VDD = 1.2 V, and this circuit does not depend on
the voltage of other power supplies (VCC, VPA, and VIO). Internal circuits are cleared to default status, then all
analog and digital outputs have no signal. The PCM1774 does not require any power supply sequencing. Set
Register data after turning all power supplies on.
System reset is enabled by setting register 85 (SRST = 1). After the reset sequence, the register data is reset to
SRST = 0 automatically. All circuits are cleared to their default status at once by the system reset. Note that the
PCM1774 has audible pop noise on the analog outputs when enabling SRST.
To reduce audible pop noise, a sequence of register settings is required after turning all power supplies on when
powering up, or before turning the power supplies off when powering down. If some modules are not required for
a particular application or operation, they should be placed in the power-down state after performing the
power-on sequence. The recommended power-on and power-off sequences are shown in Table 3 and Table 4,
respectively.
12
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