TC9328AF datasheet(4/84 Pages) TOSHIBA

4 / 84 page

TC9328AF

2004-09-13

Description of Pin Function

Pin No.

Symbol

Pin Name

Function and Operation

Remarks

COM1/OT1

COM2/OT2

COM3/OT3

COM4/OT4

LCD common

output/Output port

Output common signals to LCD panels.

Through a matrix with pins S1 to S22, a

maximum 88 segments can be

displayed.

Three levels, VLCD, VEE, and GND, are

output at 62.5 Hz every 2 ms.

VEE is output after system reset and

CLOCK STOP are released, and a

common signal is output after the DISP

OFF bit is set to “0”.

These pins can be programmed as

output ports (Note 1).

5~18

S1/OT5~

S14/OT18

LCD segment

output/Output port

19~26

P8-0/S15~

P9-3/S22

LCD segment

output/ I/O port

Segment signal output pins for LCD

panel. Together with COM1 to COM4, a

matrix is formed that can display a

maximum of 88 segments.

All pins from S1 to S14 can be

programmed as output ports (Note),

and all pins from S15 to S22 as I/O

ports, in units of pins.

When the pins function as output ports,

VLCD pin potential and GND potential

are output to them. When the pins

function as I/O ports, drain output is

N-ch open. Because power is supplied

from VLCD for the I/O ports, up to VLCD

voltage (3 V) can be applied.

These data ports (OT1 to OT18) are

incremented by 1 by instruction every

time data are accessed. Therefore, they

can be used for external memory

address signals, facilitating data

access.

Note: After system reset, the output

port pins are set to LCD output,

the I/O port pins to I/O port input.

27~30

P1-0~P1-3

I/O port 1

The input and output of these 4-bit I/O

ports can be programmed in 1-bit units.

These pins can be programmed to be

pulled up or down. Thus, they can be

used as key input pins.

By altering the input of I/O ports set to

input, the CLOCK STOP mode or the

WAIT mode can be released, and the

MUTE bit of the MUTE pin can be set to

“1”.

Note 1: When the LCD pin is set as an output port, the “H” level output is the doubled voltage VLCD. Therefore,

disconnect the voltage doubler boosting capacitor but connect the VLCD pin to the VDD pin.

VLCD

VEE

VLCD

VDD

RIN1

VDD

Input

instruction

VLCD

VDD

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