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DSP56720 데이터시트(PDF) 8 Page - Freescale Semiconductor, Inc |
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DSP56720 데이터시트(HTML) 8 Page - Freescale Semiconductor, Inc |
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8 / 54 page ![]() SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1 Freescale Semiconductor 8 2 Electrical Characteristics For electrical characteristics, see Table 2. 2.1 Chip-Level Conditions For a summary of chip-level conditions in this section, see Table 3. 2.1.1 Maximum Ratings For maximum ratings, see Table 4. CAUTION This device contains circuitry protecting against damage due to high static voltage or electrical fields. However, normal precautions should be taken to avoid exceeding maximum voltage ratings. Reliability of operation is enhanced if unused inputs are pulled to an appropriate logic voltage level (for example, either GND or VDD). The suggested value for a pull-up or pull-down resistor is 4.7 k Ω. NOTE In the calculation of timing requirements, adding a maximum value of one specification to a minimum value of another specification does not yield a reasonable sum. A maximum specification is calculated using a worst case variation of process parameter values in one direction. The minimum specification is calculated using the worst case for the same parameters in the opposite direction. Therefore, a “maximum” value for a specification will never occur in the same device that has a “minimum” value for another specification; adding a maximum to a minimum represents a condition that can never exist. Table 2. Electrical Characteristics For See Section 2.1, “Chip-Level Conditions” on page 8 Section 2.2, “Module-Level Specifications” on page 17 Table 3. Chip-Level Conditions For See Section 2.1.1, “Maximum Ratings” on page 8 Section 2.1.2, “Thermal Characteristics” on page 10 Section 2.1.3, “Power Requirements” on page 10 Section 2.1.4, “DC Electrical Characteristics” on page 11 Section 2.1.5, “AC Electrical Characteristics” on page 12 Section 2.1.6, “Internal Clocks” on page 12 Section 2.1.7, “External Clock Operation” on page 13 Section 2.1.8, “Reset, Stop, Mode Select, and Interrupt Timing” on page 14 |
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