F0448 Datasheet

X0008129 Rev.1.4

Feb 17, 2021

Page 39

8.

Application Information

The F0448 is optimized for use in high-performance RF applications from 3.3GHz to 4.2GHz.

8.1

Power Supplies

Bypass supply pins with external capacitors to minimize noise and fast transients. Supply noise can degrade

noise figure and fast transients can trigger ESD clamps and cause them to fail. Supply voltage change or

transients should have a slew rate smaller than 1V/20µS. In addition, all control pins should remain at 0V (±0.3V)

while the supply voltage ramps or while it returns to zero.

8.2

RSET and RDSET

The F0448 is optimized for gain and intermodulation products by adjusting the bias resistors RSET and RDSET.

For the optimized setting, RSET (R26) and RDSET (R25) are 4.42kΩ.

8.3

Control Pin Interface

If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot,

ringing, etc., the following circuit at the input of each control pin is recommended. This applies to control pins 3-

7, 11-14, and 32-35 as shown below. Note the recommended resistor and capacitor values do not necessarily

match the EVKit BOM for the case of poor control signal integrity.

9

8

7

6

5

4

3

2

1

18

17

16

15

14

13

12

11

10

27

26

25

24

23

22

21

20

19

36

35

34

33

32

31

30

29

28

VCTRL2_A

DATA

CLK

VCTRL2_B

STBY_B

VCTRL1_B

5kΩ

2pF

VCTRL0_A

2pF

5kΩ

VCTRL0_B

5kΩ

2pF

5kΩ

2pF

5kΩ

2pF

2pF

5kΩ

F0448

Exposed pad (GND)

STBY_A

2pF

5kΩ

VCTRL1_A

2pF

5kΩ

CSb_A

2pF

5kΩ

5kΩ

2pF

CSb_B

2pF

5kΩ

2pF

5kΩ

Figure 82. Control Pin Interface