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CDCLVD2104RHDR 데이터시트(PDF) 21 Page - Texas Instruments |
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CDCLVD2104RHDR 데이터시트(HTML) 21 Page - Texas Instruments |
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21 / 23 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 24X (0.5) (1.325) (1.325) (R0.05) TYP 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND 28X (0.75) 28X (0.24) (4.65) (4.65) ( 3.15) ( 0.2) TYP VIA VQFN - 1 mm max height RHD0028B PLASTIC QUAD FLATPACK - NO LEAD 4226146/A 08/2020 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 18X SEE SOLDER MASK DETAIL 1 7 8 14 15 21 22 28 29 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS |
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