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CDCLVD2104RHDR 데이터시트(PDF) 13 Page - Texas Instruments

부품명 CDCLVD2104RHDR
상세설명  Dual 1:4 Low Additive Jitter LVDS Buffer
PDF  23 Pages
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CDCLVD2104RHDR 데이터시트(HTML) 13 Page - Texas Instruments

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LVDS
Z = 50 W
CDCLVD2104
100 W
Z = 50 W
LVDS
Z = 50 W
CDCLVD2104
Z = 50 W
VAC_REF
50 W
50 W
100 nF
100 nF
VAC_REF
50 W
150 W
75 W
CDCLVD2104
Z = 50 W
LVPECL
100 nF
Z = 50 W
100 nF
75 W
150 W
50 W
CDCLVD2104
www.ti.com
SCAS903A – JUNE 2010 – REVISED AUGUST 2010
INPUT TERMINATION
The CDCLVD2104 inputs can be interfaced with LVDS, LVPECL, or LVCMOS drivers.
LVDS Driver can be connected to CDCLVD2104 inputs with dc or ac coupling as shown Figure 16 and
Figure 17, respectively.
Figure 16. LVDS Clock Driver Connected to CDCLVD2104 Input (AC Coupled)
Figure 17. LVDS Clock Driver Connected to CDCLVD2104 Input (DC Coupled)
Figure 18 shows how to connect LVPECL inputs to the CDCLVD2104. The series resistors are required to
reduce the LVPECL signal swing if the signal swing is >1.6 VPP.
Figure 18. LVPECL Clock Driver Connected to CDCLVD2104 Input
Copyright © 2010, Texas Instruments Incorporated
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