PIC16F753 datasheet(17/230 Pages) MICROCHIP

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 2013-2015 Microchip Technology Inc.

DS40001709C-page 17

PIC16F753/HV753

2.3.3

INTCON REGISTER

The INTCON register is a readable and writable

for TMR0 register overflow, IOCIE change and external

RA2/INT pin interrupts.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the Global

Enable bit, GIE of the INTCON register.

User

software

should

ensure

the

appropriate interrupt flag bits are clear

prior to enabling an interrupt.

INTCON: INTERRUPT CONTROL REGISTER

R/W-0

GIE

PEIE

T0IE

INTE

IOCIE

T0IF

INTF

IOCIF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

GIE: Global Interrupt Enable bit

= Enables all unmasked interrupts

= Disables all interrupts

bit 6

PEIE: Peripheral Interrupt Enable bit

= Enables all unmasked peripheral interrupts

= Disables all peripheral interrupts

bit 5

T0IE: Timer0 Overflow Interrupt Enable bit

= Enables the Timer0 interrupt

= Disables the Timer0 interrupt

bit 4

INTE: RA2/INT External Interrupt Enable bit

= Enables the RA2/INT external interrupt

= Disables the RA2/INT external interrupt

bit 3

IOCIE: Interrupt-on-Change Interrupt Enable bit(1)

= Enables the IOC change interrupt

= Disables the IOC change interrupt

bit 2

T0IF: Timer0 Overflow Interrupt Flag bit(2)

= Timer0 register has overflowed (must be cleared in software)

= Timer0 register did not overflow

bit 1

INTF: RA2/INT External Interrupt Flag bit

= The RA2/INT external interrupt occurred (must be cleared in software)

= The RA2/INT external interrupt did not occur

bit 0

IOCIF: Interrupt-on-Change Interrupt Flag bit

= An IOC pin has changed state and generated an interrupt

= No pin interrupts have been generated

Note 1:

IOC register must also be enabled.

T0IF bit is set when TMR0 rolls over. TMR0 is unchanged on Reset and should be initialized before

clearing T0IF bit.

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