전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

PM6641TR 데이터시트(PDF) 12 Page - STMicroelectronics

부품명 PM6641TR
상세설명  Monolithic VR for chipset and DDR2/3 supply for ultra-mobile PC (UMPC) applications
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM6641TR 데이터시트(HTML) 12 Page - STMicroelectronics

Back Button PM6641TR Datasheet HTML 8Page - STMicroelectronics PM6641TR Datasheet HTML 9Page - STMicroelectronics PM6641TR Datasheet HTML 10Page - STMicroelectronics PM6641TR Datasheet HTML 11Page - STMicroelectronics PM6641TR Datasheet HTML 12Page - STMicroelectronics PM6641TR Datasheet HTML 13Page - STMicroelectronics PM6641TR Datasheet HTML 14Page - STMicroelectronics PM6641TR Datasheet HTML 15Page - STMicroelectronics PM6641TR Datasheet HTML 16Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 47 page
background image
Electrical characteristics
PM6641
12/47
Symbol
Parameter
Test condition
Values
Unit
Min
Typ
Max
Power management section – DDR2/3 rails
DSCG Turn-Off Level
VAVCC = +5 V
1.5
V
DSCG Turn-On Level
3.5
EN_1S8 (S5), EN_VTT (S3)
Turn-Off Level
VAVCC = +5 V
0.8
EN_1S8 (S5), EN_VTT (S3)
Turn-On Level
2
VTT LDO section – DDR2/3 rails
PG_VTT_TH
Power-good upper threshold
106
110
114
%
Power-good lower threshold
86
90
94
%
ILDOIN,ON
LDO input bias current in full-
ON State
EN_1S8 = EN_VTT = +5 V,
No Load on VTT
110
µA
ILDOIN,STR
LDO input bias current in
suspend-To-RAM State
EN_1S8 = +5 V, EN_VTT = 0 V,
No Load on VTT
10
ILDOIN,STD
LDO input bias current in
suspend-To-Disk State
EN_1S8 = EN_VTT = 0 V,
No Load on VTT
3
IVTTFB, BIAS VTTFB bias current
EN_1S8 = EN_VTT = +5 V,
VVTTFB = VVOUT_1S8 /2
1
µA
IVTTFB, LEAK VTTFB leakage current
EN_1S8 = +5 V, EN_VTT = 0 V,
VVTTFB = VVOUT_1S8 /2
1
IVTT,LEAK
VTT leakage current
EN_1S8 = +5 V, EN_VTT = 0 V,
VVTT = VVOUT_1S8 /2
-10
10
VVTT
LDO linear regulator output
voltage (DDR2)
EN_1S8 = EN_VTT = +5 V,
IVTT 0 A, VLDOIN = 1.8 V
0.9
V
LDO linear regulator output
voltage (DDR3)
EN_1S8 = EN_VTT = +5 V,
IVTT = 0 A, VLDOIN = 1.5 V
0.75
LDO Output accuracy respect to
VTTREF, VLDOIN =1.8 V
EN_1S8 = EN_VTT = +5 V,
-1 mA < IVTT < 1 mA
-20
20
mV
EN_1S8 = EN_VTT = +5 V,
-1 A < IVTT < 1 A
-25
25
EN_1S8 = EN_VTT = +5 V,
-2 A < IVTT < 2 A
-35
35
Table 6. Electrical characteristics (continued)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com