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PM6641TR 데이터시트(PDF) 25 Page - STMicroelectronics |
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PM6641TR 데이터시트(HTML) 25 Page - STMicroelectronics |
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25 / 47 page ![]() PM6641 Device description 25/47 In order to obtain the typical integrative loop transfer function the signal stage must compensate for the power stage pole (due to the output capacitor and the load) and zero (above the loop bandwidth if ceramic output capacitors are selected). The signal stage transfer function is: Equation 2 Where gM is the power stage transconductance, KL is a design parameter and α is the gain due to the output resistor divider (0.8V / Vout). The external compensation network (Rc, Cc and CRO) introduces: ● One zero, to compensate the power stage pole: ● One pole in order to delete the static output voltage error; ● One pole, if necessary, in order to compensate the high frequency zero due to the output capacitor ESR: The control loop gain is obtained by multiplying G(s) by H(s): Equation 3 This model provides good results if the control loop cut-off frequency fCO is lower than about fsw/10. ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + + + α = 1 C C R sC sC 1 R sC K g ) s ( G C Ro C Ro C C C L m ( ) ES O O C C R R C R C + = ES O C RO R C R C = ( ) ( ) () O O ES O ES O C Ro C Ro C C C L m LOOP R 1 R R sC 1 R sC 1 C C R sC sC 1 R sC K g ) s ( G + + + ⋅ ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + + + α = |
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