IP1000A LF
Preliminary Data Sheet
26/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
4.9
100BASE-T4
1 = Capable of 100BASE-T4
0 = Not capable of 100BASE-T4
RO
Reserved 0
4.10
PAUSE
1 = MAC PAUSE implemented
0 = MAC PAUSE not implemented
R/W
0
4.11
Asymmetric
Pause
1 = Asymmetric Pause
0 = No asymmetric Pause
R/W
0
4.12
Reserved
ignore when read
R/W
0
0
4.13
Remote Fault
1 = Set Remote Fault bit
0 = Do not set Remote Fault bit
R/W
0
4.14
Reserved
ignore when read
RO
Reserved 0
4.15
Next Page
1 = Advertise
0 = Not advertised
R/W
0
3.1.6
Link Partner Ability Register (Base Page) (Reg5)
Class............................. PHY Registers
Access Method ............. Indirect access via PhyCtrl(Offset 0x76) registers
Register Address .......... 0x5
Default .......................... 0x0
Width ............................ 16 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
5.4:0
Selector Field
Received Code Work Bit 4:0
RO
0
0
5.12:5 Technology
Ability Field
Received Code Work Bit 12:5
RO
0
0
5.13
Remote Fault
Received Code Work Bit 13
RO
0
0
5.14
Acknowledge
Received Code Work Bit 14
RO
0
0
5.15
Next Page
Received Code Work Bit 15
RO
0
0
3.1.7
Auto-Negotiation Expansion Register (Reg6)
Class............................. PHY Registers
Access Method ............. Indirect access via PhyCtrl(Offset 0x76) registers
Register Address .......... 0x6
Default .......................... 0x0004
Width ............................ 16 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
6.0
Link Partner
Auto-Negotiation
Able
1 = Link Partner is Auto-Negotiation able
0 = Link Partner is not Auto-Negotiation able
RO
0
0
6.1
Page Received
1 = A New Page has been received
0 = A New Page has not been received
RO
LH
0
0
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