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ADC12DL080CIVS/NO.A 데이터시트(PDF) 17 Page - Texas Instruments |
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ADC12DL080CIVS/NO.A 데이터시트(HTML) 17 Page - Texas Instruments |
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17 / 34 page ![]() ADC12DL080 www.ti.com SNAS345A – FEBRUARY 2006 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR = +2.5V, PD = 0V, External VREF = +1.0V, fCLK = 80 MHz, fIN = 40 MHz, CL = 10 pF/pin, Duty Cycle Stabilizer On. Units for SNR and SINAD are dBFS. Units for SFDR and Distortion are dBc. Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C SNR, SINAD, SFDR vs. fCLK Distortion vs. fCLK Figure 23. Figure 24. SNR, SINAD, SFDR vs. Clock Duty Cycle Distortion vs. Clock Duty Cycle Figure 25. Figure 26. SNR, SINAD, SFDR vs. Clock Duty Cycle (DCS=OFF) Distortion vs. Clock Duty Cycle (DCS=OFF) Figure 27. Figure 28. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: ADC12DL080 |
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