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ADC12DL080CIVS/NO.A 데이터시트(PDF) 11 Page - Texas Instruments

부품명 ADC12DL080CIVS/NO.A
상세설명  ADC12DL080 Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling
PDF  34 Pages
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VA
AGND
To Internal Circuitry
I/O
ADC12DL080
www.ti.com
SNAS345A – FEBRUARY 2006 – REVISED APRIL 2013
AC Electrical Characteristics
(1)(2)(3)(4) (continued)
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =
+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 80 MHz, fIN = 40 MHz, CL = 10 pF/pin, Duty Cycle Stabilizer On. Boldface
limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C
Units
Parameter
Test Conditions
Typical(5)
Limits(5)
(Limits)
0.1 µF on pins 4,5,6,12,13,14; 10 µF
tPD
Power Down Mode Exit Cycle
100
µs
between pins 5, 6 and between pins 12, 13
Figure 2.
SPECIFICATION DEFINITIONS
APERTURE DELAY is the time after the rising edge of the clock to when the input signal is acquired or held for
conversion.
APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample.
Aperture jitter manifests itself as noise in the output.
CLOCK DUTY CYCLE is the ratio of the time during one cycle that a repetitive digital waveform is high to the
total time of one period. The specification here refers to the ADC clock input signal.
COMMON MODE VOLTAGE (VCM) is the common d.c. voltage applied to both input terminals of the ADC.
CONVERSION LATENCY is the number of clock cycles between initiation of conversion and when that data is
presented to the output driver stage. Data for any given sample is available at the output pins the Pipeline Delay
plus the Output Delay after the sample is taken. New data is available at every clock cycle, but the data lags the
conversion by the pipeline delay.
CROSSTALK is coupling of energy from one channel into the other channel.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise
and Distortion or SINAD. ENOB is defined as (SINAD - 1.76) / 6.02 and says that the converter is equivalent to a
perfect ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental
drops 3 dB below its low frequency value for a full scale input.
GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated as:
Gain Error = Positive Full Scale Error
− Negative Full Scale Error
(1)
Gain Error can also be expressed as Positive Gain Error and Negative Gain Error, which are:
PGE = Positive Full Scale Error - Offset Error
NGE = Offset Error - Negative Full Scale Error
GAIN ERROR MATCHING is the difference in gain errors between the two converters divided by the average
gain of the converters.
INTEGRAL NON LINEARITY (INL) is a measure of the deviation of each individual code from a best fit straight
line. The deviation of any given code from this straight line is measured from the center of that code value.
Copyright © 2006–2013, Texas Instruments Incorporated
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