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TMS28F002AST 데이터시트(PDF) 7 Page - Texas Instruments

부품명 TMS28F002AST
상세설명  262144 BY 8-BIT/131072 BY 16-BIT AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
PDF  79 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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TMS28F002AST 데이터시트(HTML) 7 Page - Texas Instruments

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TMS28F002Axy, TMS28F200Axy
262144 BY 8-BIT/131072 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS826D – JANUARY 1996 – REVISED SEPTEMBER 1997
7
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
block memory maps (continued)
3FFFFh
3C000h
3BFFFh
3A000h
39FFFh
38000h
37FFFh
20000h
1FFFFh
00000h
Address
Range
Boot Block
16K Addresses
Parameter Block
8K Addresses
Parameter Block
8K Addresses
Main Block
96K Addresses
Main Block
128K Addresses
8-Bit Configuration
DQ15/A –1 Is LSB Address
1FFFFh
1E000h
1DFFFh
1D000h
1CFFFh
1C000h
1BFFFh
10000h
0FFFFh
00000h
Address
Range
Boot Block
8K Addresses
Parameter Block
4K Addresses
Parameter Block
4K Addresses
Main Block
48K Addresses
Main Block
64K Addresses
16-bit
Configuration
A0 Is LSB Address
NOTE A: The TMS28F002AxT is mapped the same way as the 8-bit configuration
of the TMS28F200AxT and the LSB is A0.
Figure 1. TMS28F200AxT ( Top Boot Block ) Memory Map (See Note A)
Boot Block
16K Addresses
Parameter Block
8K Addresses
Parameter Block
8K Addresses
Main Block
128K Addresses
Main Block
96K Addresses
3FFFFh
20000h
1FFFFh
08000h
07FFFh
06000h
05FFFh
04000h
03FFFh
00000h
Address
Range 8-Bit Configuration
DQ15/A –1 Is LSB Address
1FFFFh
10000h
0FFFFh
04000h
03FFFh
03000h
02FFFh
02000h
01FFFh
00000h
Address
Range
Main Block
64K Addresses
Main Block
48K Addresses
Parameter Block
4K Addresses
Parameter Block
4K Addresses
Boot Block
8K Addresses
16-Bit
Configuration
A0 Is LSB Address
NOTE A: The TMS28F002AxB is mapped the same way as the 8-bit
configuration of the TMS28F200AxB and the LSB is A0.
Figure 2. TMS28F200AxB (Bottom-Boot Block ) Memory Map (See Note A)
boot-block data protection
The 16K-byte boot block can be used to store key system data that is seldom changed in normal operation. Data
in this block can be secured by using different combinations of the reset / deep power-down pin (RP), the
write-protect pin (WP), and VPP supply levels. Table 2 shows a listing of these combinations.



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