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LP5562TMX/NOPB 데이터시트(PDF) 43 Page - Texas Instruments |
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LP5562TMX/NOPB 데이터시트(HTML) 43 Page - Texas Instruments |
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43 / 52 page ![]() W VDD CLK 32K B ADDR SEL1 ADDR SEL0 GND G SDA SCL EN/ VCC R TO HOST TO HOST TO HOST TO HOST BLUE GREEN RED WHITE VDD GND 43 LP5562 www.ti.com SNVS820B – APRIL 2013 – REVISED DECEMBER 2016 Product Folder Links: LP5562 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated 9 Power Supply Recommendation The LP5562 is intended to operate from a single cell lithium-ion battery or battery charger up to 5.5 V. The resistance of the input supply rail should be low enough so that the input current transient does not cause too high drop at the LP5562 VDD pin. If the input supply is also powering the LEDs and is connected by using long wires additional bulk capacitance may be required in addition to the ceramic bypass capacitors in the VDD / LED supply line. 10 Layout 10.1 Layout Guidelines Figure 46 is a layout recommendation for the LP5562 used to demonstrate the principles of good layout. This example is for a 2-layer PCB and a single LP5562 device. This layout can be adapted to the actual application layout if/where possible. If multiple LP5562 devices are used in the application then not all the ADDRSEL pins will be tied to ground. In that case a PCB using HDI process is needed to route ADDRSEL0 and GND bumps. The VDD decoupling cap must be placed close to VDD bump, and the traces for W, R, G, and B bumps must be sized to carry 25.5 mA. 10.2 Layout Example Figure 46. LP5562 Layout Example |
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