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SLAS787 데이터시트(PDF) 2 Page - Texas Instruments |
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SLAS787 데이터시트(HTML) 2 Page - Texas Instruments |
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2 / 52 page ![]() Clock System Brownout Protection RST/NMI DVCC DVSS MCLK Watchdog WDT+ 15-Bit Timer0_A2 2 CC Registers 16-MHz CPU incl. 16 Registers Emulation 2BP JTAG Interface SMCLK ACLK MDB MAB Port P1 8 I/O Interrupt capability pullup/down resistors P1.x 8 Spy-Bi- Wire XIN XOUT RAM 128B Flash 2KB ADC 10-Bit 8 Ch. Autoscan 1 ch DMA P2.x Port P2 2 I/O Interrupt capability pullup/down resistors 2 USI Universal Serial Interface SPI, I2C MSP430G2231-Q1 SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014 www.ti.com 4 Functional Block Diagram Figure 1. Functional Block Diagram 2 Submit Documentation Feedback Copyright © 2011–2014, Texas Instruments Incorporated Product Folder Links: MSP430G2231-Q1 |
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