TMS320VC33 datasheet(27/53 Pages) TI2

27 / 53 page

TCLK as input

t su(TCLK-H1L)

th(H1L-TCLK)

t su(TCLK-H1L)

t w(TCLK)

c(TCLK)

I/O

Control

Bit

Execution of Store

of Peripheral-

Control Register

Peripheral Pin (1)

t d(H1H-GPIO)

Value on Pin

Seen in

Peripheral-

Control

Synchronizer Delay

Buffers Go

From

Output to

Input

Execution

of Store of

Peripheral-

Control

Data Bit

I/O

Control Bit

Output

Data

Seen

Data

Sampled

Peripheral Pin (1)

tsu(GPIO-H1L)

t h(H1L-GPIO)

t dis(H1H)

SM320VC33, SMJ320VC33

www.ti.com

SGUS034F – FEBRUARY 2001 – REVISED JUNE 2015

Parameter Measurement Information (continued)

Peripheral pins include CLKX0, CLKR0, DX0, DR0, FSX0, FSR0, and TCLK0/1.

Figure 19. Change of Peripheral Pin from General-Purpose Output to Input Mode Timing

Peripheral pins include CLKX0, CLKR0, DX0, DR0, FSX0, FSR0, and TCLK0/1.

Figure 20. Change of Peripheral Pin from General-Purpose Input to Output Mode Timing

Figure 21. Timer Pin Timing, Input

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Product Folder Links: SM320VC33 SMJ320VC33

TMS320VC33 데이터시트(PDF) 27 Page - Texas Instruments

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