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ZL40220LDF1 데이터시트(PDF) 1 Page - Microsemi Corporation |
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ZL40220LDF1 데이터시트(HTML) 1 Page - Microsemi Corporation |
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1 / 24 page ![]() 1 Microsemi Corporation Copyright 2014, Microsemi Corporation, All Rights Reserved. Features Inputs/Outputs • Accepts two differential or single-ended inputs • LVPECL, LVDS, CML, HCSL, LVCMOS • Glitch-free switching of references • Six precision LVDS outputs • Operating frequency up to 750 MHz Power • Option for 2.5 V or 3.3 V power supply • Current consumption of 95 mA • On-chip Low Drop Out (LDO) Regulator for superior power supply rejection Performance • Ultra low additive jitter of 194 fs RMS Applications • General purpose clock distribution • Low jitter clock trees • Logic translation • Clock and data signal restoration • Redundant clock distribution • Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC • PCI Express generation 1/2/3 clock distribution • Wireless communications • High performance microprocessor clock distribution April 2014 Figure 1 - Functional Block Diagram clk0_p clk0_n sel clk1_p clk1_n out5_p out5_n out4_p out4_n out3_p out3_n out2_p out2_n out1_p out1_n out0_p out0_n Buffer ZL40220 Precision 2:6 LVDS Fanout Buffer with Glitch-free Input Reference Switching Data Sheet Ordering Information ZL40220LDG1 32 Pin QFN Trays ZL40220LDF1 32 Pin QFN Tape and Reel Matte Tin Package size: 5 x 5 mm -40oC to +85oC |
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