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LM5025AMTC/NOPB 데이터시트(PDF) 14 Page - Texas Instruments

부품명 LM5025AMTC/NOPB
상세설명  LM5025A Active Clamp Voltage Mode PWM Controller
PDF  34 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

LM5025AMTC/NOPB 데이터시트(HTML) 14 Page - Texas Instruments

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VCC
PGND
CNTRL
OUT
OUT_A
OUT_B
OUT_A
OUT_B
K1 * RSET
N-Channel Active Clamp
(RSET to REF)
P-Channel Active Clamp
(RSET to GND)
K2 * RSET
K1 * RSET
K2 * RSET
14
LM5025A
SNVS293F – DECEMBER 2004 – REVISED AUGUST 2016
www.ti.com
Product Folder Links: LM5025A
Submit Documentation Feedback
Copyright © 2004–2016, Texas Instruments Incorporated
Feature Description (continued)
Figure 10. PWM Outputs
7.3.4 Compound Gate Drivers
The LM5025A contains two unique compound gate drivers, which parallel both MOS and Bipolar devices to
provide high-drive current throughout the entire switching event. The bipolar device provides most of the drive
current capability and provides a relatively constant sink current which is ideal for driving large power MOSFETs.
As the switching event nears conclusion and the bipolar device saturates, the internal MOS device continues to
provide a low impedance to compete the switching event.
During turnoff at the Miller plateau region, typically around 2 V to 3 V, is where gate driver current capability is
needed most. The resistive characteristics of all MOS gate drivers are adequate for turnon because the supply to
output voltage differential is fairly large at the Miller region. During turnoff however, the voltage differential is
small and the current source characteristic of the bipolar gate driver is beneficial to provide fast drive capability.
Figure 11. Compound Gate Drivers
7.3.5 PWM Comparator
The PWM comparator compares the ramp signal (RAMP) to the loop error signal (COMP). This comparator is
optimized for speed to achieve minimum controllable duty cycles. The internal 5-kΩ pullup resistor, connected
between the internal 5-V reference and COMP, can be used as the pullup for an optocoupler. The comparator
polarity is such that 0 V on the COMP pin produces a zero duty cycle on both gate driver outputs.



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