전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

DLP4710LCFQL 데이터시트(PDF) 4 Page - Texas Instruments

부품명 DLP4710LCFQL
상세설명  DLP4710LC 0.47 1080p Digital Micromirror Device
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

DLP4710LCFQL 데이터시트(HTML) 4 Page - Texas Instruments

  DLP4710LCFQL Datasheet HTML 1Page - Texas Instruments DLP4710LCFQL Datasheet HTML 2Page - Texas Instruments DLP4710LCFQL Datasheet HTML 3Page - Texas Instruments DLP4710LCFQL Datasheet HTML 4Page - Texas Instruments DLP4710LCFQL Datasheet HTML 5Page - Texas Instruments DLP4710LCFQL Datasheet HTML 6Page - Texas Instruments DLP4710LCFQL Datasheet HTML 7Page - Texas Instruments DLP4710LCFQL Datasheet HTML 8Page - Texas Instruments DLP4710LCFQL Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 45 page
background image
Table 5-1. Pin Functions – Connector Pins (continued)
PIN(1)
TYPE
SIGNAL
DATA RATE
DESCRIPTION
PACKAGE NET
LENGTH(2) (mm)
NAME
NO.
D_BN(2)
D28
I
SubLVDS
Double
Data, Negative
2.76
D_BN(3)
D26
I
SubLVDS
Double
Data, Negative
5.47
D_BN(4)
L25
I
SubLVDS
Double
Data, Negative
4.85
D_BN(5)
K25
I
SubLVDS
Double
Data, Negative
4.10
D_BN(6)
L28
I
SubLVDS
Double
Data, Negative
2.53
D_BN(7)
K27
I
SubLVDS
Double
Data, Negative
2.76
D_BP(0)
F27
I
SubLVDS
Double
Data, Positive
2.51
D_BP(1)
E27
I
SubLVDS
Double
Data, Positive
4.43
D_BP(2)
D27
I
SubLVDS
Double
Data, Positive
2.76
D_BP(3)
D25
I
SubLVDS
Double
Data, Positive
5.47
D_BP(4)
L26
I
SubLVDS
Double
Data, Positive
4.85
D_BP(5)
J25
I
SubLVDS
Double
Data, Positive
4.10
D_BP(6)
K28
I
SubLVDS
Double
Data, Positive
2.53
D_BP(7)
J27
I
SubLVDS
Double
Data, Positive
2.76
DCLK_AN
J3
I
SubLVDS
Double
Clock, Negative
3.77
DCLK_AP
K3
I
SubLVDS
Double
Clock, Positive
3.77
DCLK_BN
H26
I
SubLVDS
Double
Clock, Negative
2.98
DCLK_BP
H27
I
SubLVDS
Double
Clock, Positive
2.98
CONTROL INPUTS
LS_WDATA
D3
I
LPSDR(1)
Single
Write data for low speed interface.
1.20
LS_CLK
C3
I
LPSDR
Single
Clock for low-speed interface
1.20
DMD_DEN_ARSTZ
B6
I
LPSDR
Asynchronous reset DMD signal. A low
signal places the DMD in reset. A high
signal releases the DMD from reset
and places it in active mode.
4.19
LS_RDATA_A
C6
O
LPSDR
Single
Read data for low-speed interface
3.93
LS_RDATA_B
C4
O
LPSDR
Single
Read data for low-speed interface
2.57
POWER (3)
VBIAS
B27
Power
Supply voltage for positive bias level at
micromirrors
24.51
VBIAS
B4
Power
24.51
VOFFSET
B2
Power
Supply voltage for HVCMOS core
logic. Supply voltage for stepped
high level at micromirror address
electrodes.
Supply voltage for offset level at
micromirrors.
49.56
VOFFSET
C29
Power
49.56
VRESET
B28
Power
Supply voltage for negative reset level
at micromirrors.
24.82
VRESET
B3
Power
24.82
DLP4710LC
DLPS178C – MAY 2020 – REVISED JULY 2023
www.ti.com
4
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: DLP4710LC



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com