STM32WB10CCU5 datasheet(94/110 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32WB10CC

94/110

DS13259 Rev 2

Table 68. ADC accuracy(1)(2)(3)

Symbol

Parameter

Conditions(4)

Min

Typ

Max

Unit

Total

unadjusted

error

VDDA = 3 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = 25 °C

-3

LSB

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

-3

6.5

Offset error

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

-1.5

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

-1.5

4.5

Gain error

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

-3

3.5

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

-3

Differential

linearity error

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

-1.2

1.5

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

-1.2

1.5

Integral

linearity error

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

-2.5

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

-2.5

ENOB

Effective

number of bits

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

10.1

10.2

bit

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

9.6

10.2

SINAD

Signal-to-noise

and



distortion ratio

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

62.5

63.0

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

59.5

63.0

SNR

Signal-to-noise

ratio

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

63.0

64.0

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

60.0

64.0

THD

Total harmonic

distortion

VDDA = 3 V, fADC = 35 MHz, 

fs ≤ 2.5 Msps, TA = 25 °C

--74

-73

2.0 V < VDDA < 3.6 V, fADC = 35 MHz,

fs ≤ 2.5 Msps, TA = entire range

--74

-70

1. Based on characterization results, not tested in production.

2. ADC DC accuracy values are measured after internal calibration.

3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion of signal on

another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins susceptible to receive

negative current.

4. I/O analog switch voltage booster is enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled

when VDDA ≥ 2.4 V.

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