N/C

±IN

+IN

V±

V+

OUTPUT

N/C

N/C

VS+

GND

VS±

GND

Ground (GND) plane on another layer

VOUT

VIN

GND

Run the input traces

as far away from

the supply lines

as possible

Use low-ESR, ceramic

bypass capacitor

RF

RG

Place components

close to device and to

each other to reduce

parasitic errors

+

VIN

VOUT

RG

RF

(Schematic Representation)

Use low-ESR,

ceramic bypass

capacitor

25

LMP2021, LMP2022

www.ti.com

SNOSAY9G – SEPTEMBER 2008 – REVISED FEBRUARY 2016

Product Folder Links: LMP2021 LMP2022

Submit Documentation Feedback

Copyright © 2008–2016, Texas Instruments Incorporated

Layout Guidelines (continued)

methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.

A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital

and analog grounds paying attention to the flow of the ground current. For more detailed information refer to

SLOA089, Circuit Board Layout Techniques.

•

In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as

possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular

as opposed to in parallel with the noisy trace.

•

Place the external components as close to the device as possible. As shown in Typical Characteristics,

keeping RF and RG close to the inverting input minimizes parasitic capacitance.

•

Keep the length of input traces as short as possible. Always remember that the input traces are the most

sensitive part of the circuit.

•

Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce

leakage currents from nearby traces that are at different potentials.

10.2 Layout Example

Figure 48. Operational Amplifier Board Layout for Noninverting Configuration