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LMP2021 데이터시트(PDF) 5 Page - Texas Instruments

부품명 LMP2021
상세설명  LMP202x Zero-Drift, Low-Noise, EMI-Hardened Amplifiers
PDF  42 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

LMP2021 데이터시트(HTML) 5 Page - Texas Instruments

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LMP2021, LMP2022
www.ti.com
SNOSAY9G – SEPTEMBER 2008 – REVISED FEBRUARY 2016
Product Folder Links: LMP2021 LMP2022
Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA.
(2)
All limits are specified by testing, statistical analysis or design.
(3)
Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
(4)
Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
(5)
The EMI Rejection Ratio is defined as EMIRR = 20Log ( VRF-PEAK/ΔVOS).
6.5 Electrical Characteristics: 2.5 V
(1)
Unless otherwise specified, all limits are ensured for TA = 25°C, V
+ = 2.5 V, V− = 0 V, V
CM = V
+/2, R
L >10 kΩ to V
+/2.
PARAMETER
TEST CONDITIONS
MIN(2)
TYP(3)
MAX(2)
UNIT
VOS
Input Offset Voltage
–5
–0.9
5
μV
–40°C
≤ TJ ≤ 125°C
–10
10
TCVOS
Input Offset Voltage Drift(4)
–0.02
0.001
0.02
μV/°C
IB
Input Bias Current
–100
±23
100
pA
–40°C
≤ TJ ≤ 125°C
–300
300
IOS
Input Offset Current
–200
±57
200
pA
–40°C
≤ TJ ≤ 125°C
–250
250
CMRR
Common Mode Rejection Ratio
−0.2 V ≤ VCM ≤ 1.7 V, 0 V ≤ VCM ≤ 1.5 V
105
141
dB
−0.2 V ≤ VCM ≤ 1.7 V, 0 V ≤ VCM ≤ 1.5 V,
–40°C
≤ TJ ≤ 125°C
102
CMVR
Input Common-Mode Voltage
Range
Large Signal CMRR
≥ 105 dB
−0.2
1.7
V
Large Signal CMRR
≥ 102 dB, –40°C ≤ TJ ≤
125°C
0
1.5
EMIRR
Electro-Magnetic Interference
Rejection Ratio(5)
IN+
and
IN
−
VRF-PEAK = 100 mVP (−20 dBVP)
f = 400 MHz
40
dB
VRF-PEAK = 100 mVP (−20 dBVP)
f = 900 MHz
48
VRF-PEAK = 100 mVP (−20 dBVP)
f = 1800 MHz
67
VRF-PEAK = 100 mVP (−20 dBVP)
f = 2400 MHz
79
PSRR
Power Supply Rejection Ratio
2.5 V
≤ V+ ≤ 5.5 V, VCM = 0
115
130
dB
2.5 V
≤ V+ ≤ 5.5 V, VCM = 0 , –40°C ≤ TJ ≤
125°C
112
2.2 V
≤ V+ ≤ 5.5 V, VCM = 0
110
130
AVOL
Large Signal Voltage Gain
RL = 10 kΩ to V
+/2, V
OUT = 0.5 V to 2 V
124
150
dB
RL = 10 kΩ to V
+/2, V
OUT = 0.5 V to 2 V,
–40°C
≤ TJ ≤ 125°C
119
RL = 2 kΩ to V
+/2, V
OUT = 0.5 V to 2 V
120
150
RL = 2 kΩ to V
+/2, V
OUT = 0.5 V to 2 V,
–40°C
≤ TJ ≤ 125°C
115
VOUT
Output Swing High
RL = 10 kΩ to V
+/2
38
50
mV
from either
rail
RL = 10 kΩ to V
+/2, –40°C ≤ T
J ≤ 125°C
70
RL = 2 kΩ to V
+/2
62
85
RL = 2 kΩ to V
+/2, –40°C ≤ T
J ≤ 125°C
115
Output Swing Low
RL = 10 kΩ to V
+/2
30
45
RL = 10 kΩ to V
+/2, –40°C ≤ T
J ≤ 125°C
55
RL = 2 kΩ to V
+/2
58
75
RL = 2 kΩ to V
+/2, –40°C ≤ T
J ≤ 125°C
95
IOUT
Linear Output Current
Sourcing, VOUT = 2 V
30
50
mA
Sinking, VOUT = 0.5 V
30
50



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