6 Detailed Description

6.1 Overview

The DLP391TP digital micromirror device (DMD) is a 0.39" diagonal spatial light modulator that consists of

an array of highly reflective aluminum micromirrors. The DMD is an electrical input, optical output micro-optical-

electrical-mechanical system (MOEMS). The fast switching speed of the DMD micromirrors, combined with

advanced DLP image processing algorithms, enables each micromirror to display four distinct pixels on the

screen during every frame, resulting in a full 3840 × 2160 pixel image being displayed. The electrical interface is

low-voltage differential signaling (LVDS). The DMD consists of a two-dimensional array of 1-bit CMOS memory

cells. The array is organized in a grid of M memory cell columns by N memory cell rows. Refer to the Section

6.2. The deflection of the micromirrors (positive or negative) is individually controlled by changing the address

voltage of the underlying CMOS addressing circuitry and micromirror reset signals (MBRST).

The DLP 0.39" 4K UHD chipset is comprised of the DLP391TP DMD, DLPC8445V display controller, and the

DLPA3085 / DLPA3082 PMIC and the LED driver. For reliable operation, the DLP391TP DMD must always be

used with the DLP display controller and the PMIC specified in the chipset.

6.2 Functional Block Diagram

Bit Lines

Word

Lines

(0,0)

Voltages

Misc

Voltage

Generators

High-Speed

Interface

Control

SRAM

(1536,1360)

Row

Low-Speed

Interface

Control

Column Write

Control

Column Read

Figure 6-1. Functional Block Diagram

DLP391TP

DLPS289A – JUNE 2025 – REVISED SEPTEMBER 2025

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