7.3 Power Supply Recommendations

The VPWR pin provides power to all the circuitry in the TPD4S201. It is recommended a 1-µF decoupling

capacitor is placed as close as possible to the VPWR pin. If USB PD is desired to be operated in dead battery

conditions, it is critical that the TPD4S201 share the same power supply as the PD controller in dead battery

boot-up (such as sharing the same dead battery LDO). See the CC Dead Battery Resistors Integrated for

Handling the Dead Battery Use Case in Mobile Devices section for more details.

7.4 Layout

7.4.1 Layout Guidelines

Proper routing and placement is important to maintain the signal integrity the SBU and CC line signals. The

following guidelines apply to the TPD4S201:

• Place the bypass capacitors as close as possible to the VPWR pin, and ESD protection capacitor as close

as possible to the VBIAS pin. Attach capacitors to a solid ground to minimize voltage disturbances during

transient events such as short-to-VBUS and ESD strikes.

• Route the SBU lines as straight as possible and minimize any sharp bends.

Standard ESD recommendations apply to the C_CC1, C_CC2, C_SBU1, C_SBU2:

• The optimum placement for the device is as close to the connector as possible:

– EMI during an ESD event couples from the trace being struck to other nearby unprotected traces, resulting

in early system failures.

– The PCB designer minimizes the possibility of EMI coupling by keeping any unprotected traces away from

the protected traces which are between the TPD4S201 and the connector.

• Route the protected traces as straight as possible.

• Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded

corners with the largest radii possible.

– Electric fields tend to build up on corners, increasing EMI coupling.

7.4.2 Layout Example

Figure 7-6. TPD4S201 Top Layer Routing

Figure 7-7. TPD4S201 Bottom Layer Routing

TPD4S201

SLVSIF2 – JULY 2025

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