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TPD4S201 데이터시트(PDF) 26 Page - Texas Instruments |
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TPD4S201 데이터시트(HTML) 26 Page - Texas Instruments |
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26 / 28 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 0.05 MIN ALL AROUND 0.05 MAX ALL AROUND 20X (0.2) 20X (0.6) ( ) TYP VIA 0.2 16X (0.4) (2.8) (2.8) (0.6) TYP ( 1.7) (R ) TYP 0.05 WQFN - 0.8 mm max height RUK0020B PLASTIC QUAD FLATPACK - NO LEAD 4222676/A 02/2016 SYMM 1 5 6 10 11 15 16 20 SYMM LAND PATTERN EXAMPLE SCALE:20X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 21 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED METAL SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) |
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