0

20

40

60

80

100

120

140

160

-

-

-

-

-

-

-

-

10

100

1k

10k

100k

1M

10M

100M

Single-SidebandFrequency(Hz)

CDCE421A

SCAS873 – APRIL 2009..................................................................................................................................................................................................... www.ti.com

Figure 10 and Table 14 show the SSB phase noise plot and phase noise at 400 MHz for LVDS from 100 Hz to

40 MHz from the carrier. See Figure 7 and Figure 8 for the test configuration setup for LVPECL and LVDS ac

termination, respectively.

Figure 10. SSB Phase Noise at 400-MHz LVDS Output with LVCMOS Input of 33.33 MHz

Table 14. Phase Noise Data for LVDS at 400 MHz with LVCMOS Input of 33.33 MHz(1)

PARAMETER

MIN

TYP

MAX

UNIT

phn100

Phase noise at 100 Hz

–99

dBc/Hz

phn1k

Phase noise at 1 kHz

–109

dBc/Hz

phn10k

Phase noise at 10 kHz

–119

dBc/Hz

phn100k

Phase noise at 100 kHz

–121

dBc/Hz

phn1M

Phase noise at 1 MHz

–130

dBc/Hz

phn10M

Phase noise at 10 MHz

–147

dBc/Hz

phn20M

Phase noise at 20 MHz

–147

dBc/Hz

JRMS

RMS jitter from 10 kHz to 20 MHz

409

fs

(1)

Phase noise specifications under following assumptions: input frequency = 33.33 MHz (VCO = 1, prescaler = 5, output divider = 1),

output frequency = 400 MHz at LVDS.

18

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