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CDCLVC1310 데이터시트(PDF) 17 Page - Texas Instruments

부품명 CDCLVC1310
상세설명  Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator
PDF  31 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
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CDCLVC1310 데이터시트(HTML) 17 Page - Texas Instruments

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MUX isolation
Yx, if MUX selects active input signal
Yx, if MUX selects static input signal
Frequency [MHz]
f
carrier
Differential input
SE input
Output enable OE
Output Yx
t
3
t
4
or
X_INP
X_INN
X_INP
CDCLVC1310
www.ti.com
SCAS917E – JULY 2011 – REVISED JANUARY 2014
If the outputs are in the high-impedance state, pulling OE to HIGH forces all outputs LOW asynchronously (t3).
Within two clock cycles (maximum), the outputs start switching again (t4), after a falling edge of the input signal
(see Figure 17).
Figure 17. OE: Enable Outputs
If the outputs are in the high-impedance state and the input is static (no clock signal), OE works fully
asynchronously. A transition of OE from LOW to HIGH forces the outputs to LOW. A transition from HIGH to
LOW does not force to the high-impedance state again. Therefore, a state change requires a falling edge of the
input signal (see Figure 16).
MUX Isolation
The definition of MUX isolation is the difference in output amplitude (dB) between an active and a static input
signal.
Figure 18. Output Spectrum of an Active and a Static Input Signal
Copyright © 2011–2014, Texas Instruments Incorporated
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