L9678P datasheet(211/215 Pages) STMICROELECTRONICS

211 / 215 page

DS11626 Rev 9

211/216

L9678P, L9678P-S

Errata sheet

214

Errata sheet

Table 66. Errata sheet

Category /

Function

Issue description

Deployment

In comparison with the other ICs of the family, deployment current counter feature is not

available, as consequence the high side driver diagnostic is not available as well.

Safing

There is an issue inside digital block that could prevent ARMING to be removed. This

issue does not affect the activation of ARM signals but it’s just related to removal of it.

This happens when the sign of acceleration data changes from positive to negative and

vice versa. When negative data is received and abs value is below threshold only the

negative event counter is decremented (the correct implementation should be that both

positive and negative counters must be decremented). When negative data is received

and abs value is above the threshold the negative event counter is incremented and

positive is decremented (so no issue in this case). You can apply the same

considerations when positive data is received.

We can show the effect of this issue with an example.

Suppose a threshold equal to 8 and 3 samples above th. to arm.

The sequence of incoming data is: +10,+10,+10, -1, -1, +1.

After the third data equal to +10 the device will correctly arm but disarm will happen only

when +1 is received while correct behavior should be that disarm happens when the first

-1 is received.

Safing

There is an issue inside digital block that affects functionality of ARMING if COMBINE

function is selected.

Use record1 and record2 to make an example with COMBINE enabled.

In record 1 we will store the sum between data1 and data2.

The logic should look at the sign of sum calculation to increment pos. or neg. event

counter.

The issue is that logic looks at the sign of data1 to increment pos. or neg. event counter.

This has effect on ARMING and DISARMING.

We can suppose a sequence like this:

Data1: +1, -1, +1, -1, +1, -1.

Data2: +10, +10, +10, +10, +10

If threshold is 8 we should ARM after the third sample but in this case we will never ARM.

Safing

There is an issue inside arming digital block that prevents the use of sensors where MSB

(first bit received) belongs to data field. If this is the case the data will not be processed

correctly by the logic and ARMING will be affected.

Safing

There is an issue inside arming digital block that prevents multiple change of data mask

registers. This because data mask register is processed just one time each RESET cycle

when safing record is enabled and SAF_CC is read. So data mask register must be

written before enabling the record and cannot be changed after the first SAF_CC read

otherwise the data will not be processed correctly and this could affect ARMING function.

Safing

There is an issue inside arming digital block that affects WID_ERR set in case

microcontroller sends SPI command to change SAF_DATA_MASK register not in the

correct phase.

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