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TPS2550DBVT 데이터시트(PDF) 2 Page - Texas Instruments

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부품명 TPS2550DBVT
상세설명  ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
PDF  28 Pages
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홈페이지  http://www.ti.com
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TPS2550DBVT 데이터시트(HTML) 2 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
TPS2550
TPS2551
SLVS736 – FEBRUARY 2008
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields.
These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to
MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than
maximum-rated voltages to these high-impedance circuits. During storage or handling the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic
voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication
Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
AVAILABLE OPTIONS AND ORDERING INFORMATION
DEVICE
AMBIENT
ENABLE
SON (1)
SOT23(1)
RECOMMENDED MAXIMUM
TEMPERATURE
(DRV)
(DBV)
CONTINUOUS LOAD CURRENT
TPS2550
Active low
TPS2550DRV
TPS2550DBV
1.1 A
–40
°C to 85°C
TPS2551
Active high
TPS2551DRV
TPS2551DBV
1.1 A
(1)
Add an R suffix to the device type for tape and reel.
over operating free-air temperature range unless otherwise noted
(1) (2)
VALUE
UNIT
Voltage range on IN, OUT, EN or EN, ILIM, FAULT
–0.3 to 7
V
Voltage range from IN to OUT
–7 to 7
V
IOUT
Continuous output current
Internally limited
See "Dissipation Rating
Continuous total power dissipation
Table"
FAULT sink current
25
mA
ILIM source current
1
mA
HBM
2
kV
ESD
CDM
500
V
TJ
Maximum junction temperature
–40 to 150
°C
TSgt
Storage temperature
–65 to 150
°C
Lead temperature 1,6 mm (1/16-inch) from case for 10 seconds
300
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
Voltages are referenced to GND unless otherwise noted.
BOARD
PACKAGE
THERMAL
THERMAL
TA ≤ 25°C
DERATING
TA = 70°C
TA = 85°C
RESISTANCE
RESISTANCE
POWER
FACTOR ABOVE
POWER
POWER
θ
JA
θ
JC
RATING
TA = 25°C
RATING
RATING
Low-K(1)
DBV
350
°C/W
55
°C/W
285 mW
2.85 mW/
°C
155 mW
114 mW
High-K(2)
DBV
160
°C/W
55
°C/W
625 mW
6.25 mW/
°C
340 mW
250 mW
Low-K(1)
DRV
140
°C/W
20
°C/W
715 mW
7.1 mW/
°C
395 mW
285 mW
High-K(2)
DRV
75
°C/W
20
°C/W
1330 mW
13.3 mW/
°C
730 mW
530 mW
(1)
The JEDEC low-K (1s) board used to derive this data was a 3in
× 3in, two-layer board with 2-ounce copper traces on top of the board.
(2)
The JEDEC high-K (2s2p) board used to derive this data was a 3in
× 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2550 TPS2551



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