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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L9300 데이터시트(PDF) 25 Page - STMicroelectronics |
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L9300 데이터시트(HTML) 25 Page - STMicroelectronics |
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25 / 178 page  Type of error Detection condition Action Clear SPI flag Restart condition VDD2 overtemperature ON state No action if out of regulation is not triggered; output disabled, and T_SD_TRK (5)SPI fault bit latched otherwise in TRK-CAN FAULT register On read Automatic restart with slope control after OT fault disappears. 8.3 VDD3 8.3.1 VDD3 functional description VDD3 is a linear regulator using external N-channel transistor as output stage to deliver current to the load and reduce ASIC power dissipation. The regulated voltage is configurable through the external feedback resistors. Dedicated monitors are present on the VDD3_SEL pin to detect VDD3 undervoltage and overvoltage conditions; voltage monitors are not masked during power-up phase. Figure 12. VDD3 linear regulator with external N-ch FET X VCP Driver loop Control Linear VDD3 R3dw R3up X VDRAIN VDD3_SEL VDD3 VDD3_G GADG1007171200PS VDRAIN can be connected to either VBATP or, in order to limit power consumption, to a pre-regulated voltage. 8.3.2 VDD3 electrical characteristics 5.5 V ≤ VBATP ≤ 19 V; 5.5 V ≤ VDRAIN ≤ 19 V; -40 °C ≤ Tj ≤ 175 °C unless otherwise noticed. All voltages refer to GND pin. STD20NF06L used as test reference for external MOS. Table 10. VDD3 electrical characteristics Symbol Parameter Test condition Min Typ Max Unit Pin Ciss External FET input capacitor Application note: FET selection max input capacitance to guarantee stability 900 pF Gm External FET transconductance Application note: FET selection 20 mho Vth External FET threshold Application note: FET selection threshold voltage 3 V VDD3_Vout Output voltage Application note 0.8 5 V VDD3 IVDD3 Output load current Application note 0.01 1 A VDD3 CVDD3 Output capacitor Application note 5 22 40 µF VDD3 L9300 Power supply DS12258 - Rev 5 page 25/178 |
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