L9347

Functional Description

19/29

Clock failure (clock loss) (1)

L

L

L

L

L

L

H

H

L

H/PWM

L

H/PWM

OFF

OFF

OFF

OFF

H

H

H

L

Drift (2)

Failure

No failure

H

H

H

H

L

L

H

H

L

H/PWM

H/PWM

H/PWM

OFF

OFF

ON

ON

X

X

L

H

1.

During power on sequence only detected on channel 3 and 4 (see description).

2.

This input combination is also used for an internal chip-test and must not be used.

Table 9.

Diagnostic table (continued)

Operating Condition

Test

Input

TEST

Enable

Input

ENA

Control

Input non-

reg./reg. IN

Power

Output/Curr

ent reg. Q

Status

Output

ST