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STPM098C 데이터시트(PDF) 91 Page - STMicroelectronics |
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STPM098C 데이터시트(HTML) 91 Page - STMicroelectronics |
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91 / 110 page ![]() Table 72. ZC offset2 configuration bit GAINZC2 GAINZC1 GAINZC0 Description 0 0 0 ZC_OFFSET = -3.2 mV (default) 0 0 1 ZC_OFFSET = -9.6 mV 0 1 0 ZC_OFFSET = -16 mV 0 1 1 ZC_OFFSET = -22.4 mV 1 0 0 ZC_OFFSET = 22.4 mV 1 0 1 ZC_OFFSET = 16 mV 1 1 0 ZC_OFFSET = 9.6 mV 1 1 1 ZC_OFFSET = 3.2 mV Figure 76. Zero-current detection simplified block diagram DIGITAL LOOP CTRL HIZ ISENn VREF1/CFILT Gm PWMn - + GND VCC DRV GND VREF2/CFILT ZC R S ZC_MASK_DELAY PWM PWM + - ZC_OFFSET Zero current detection masking time in terms of successive PWM periods can be configured by a dedicated PMBus™ bit ZC_MASK_DELAY<2:0>. ZCMASKDELAY=ZCMASKDELAYlsb×ZCMASKDELAY2:0 (65) Where: ZC_MASK_DELAY_lsb is the minimum masking step [25 ns]. ZC_MASK_DELAY [2:0] are the dedicated PMBus™ configuration bits [0 ~ 175 ns]. The default value is ZC_MASK_DELAY = 0x0. This nonlinear control forces the DrMOS state according to control loop assertion while switch DrMOS to tristate as soon as phase current crosses the zero level, thus emulating an asynchronous rectification. As a consequence of this behavior the loop controller reacts by linearly reducing the equivalent switching frequency that effectively results in lowered switching losses. STPM098C Functional description DS14440 - Rev 1 page 91/110 |
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