PAC1933T-ISLASHJQ. datasheet(48/62 Pages) MICROCHIP

48 / 62 page

PAC1932/3/4

DS20005850C-page 48

 2017-2018 Microchip Technology Inc.

bit 3

= Channel 1 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 1 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

bit 2

= Channel 2 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 2 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

bit 1

= Channel 3 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 3 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

bit 0

= Channel 4 VBUS ADC converts 0 to +32V range with 16-bit straight binary output

= Channel 4 VBUS ADC converts -32V to +32V range with 16-bit two’s complement output

CTRL_LAT REGISTER (ADDRESS 24H)

R-0R-0

Sample_Rate<1:0>

SLEEP

SING

ALERT_PIN

ALERT_CC

OVF ALERT

OVF

bit 7

bit 0

Legend:

R = Readable bit

W = Writeable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = bit is set

‘0’ = Bit is cleared

x = Bit is unknown

This register contains an image of the Register 6-15 CTRL_ACT Register (Address 21h). The bits in this register

reflect the value of these settings that was active before the most recent REFRESH command (including REFRESH_V

and/or REFRESH_G). The values in register 01h may have been programmed but not activated by one of the

REFRESH commands, and the values in 21h are currently active. This register allows software to determine the actual

active setting that was active prior to the most recent REFRESH command and therefore corresponds to the dataset

that is held in the readable registers. This register is valid when the Results registers are valid, 1 ms after a

REFRESH/_V/_G command.

bit 7-6

Sample_Rate<1:0>

: shows the value of these settings that was latched prior to the most recent

REFRESH command (including REFRESH_V and/or REFRESH_G)

00b

= 1024 samples/s

01b

= 256 samples/s

10b

= 64 samples/s

11b

= 8 samples/s

bit 5

SLEEP

: shows the value of these settings that was latched prior to the most recent REFRESH

command (including REFRESH_V and/or REFRESH_G).

= Active mode

= SLEEP mode, no data conversion

bit 4

SING

: shows the value of these settings that was latched prior to the most recent REFRESH command

(including REFRESH_V and/or REFRESH_G).

= Sequential scan mode

= Single-shot mode

bit 3

ALERT_PIN

: the value of these settings that was latched prior to the most recent REFRESH command

(including REFRESH_V and/or REFRESH_G).

= Disable the ALERT pin function

= Enable the ALERT pin function

bit 2

ALERT_CC

: shows the value of these settings that was latched prior to the most recent REFRESH

command (including REFRESH_V and/or REFRESH_G) for the ALERT_CC bit.

= No ALERT on Conversion Cycle Complete

= ALERT function asserted for 5 μS on each completion of the conversion cycle

NEG_PWR_ACT (ADDRESS 23H) (CONTINUED)

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