STA1090 datasheet(86/127 Pages) STMICROELECTRONICS

부품명	STA1090

상세설명	Accordo2 family – Automotive dual core processor for car radio and display audio application

PDF	127 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

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Electrical Characteristics

STA108x, STA109x

86/127

DS13319 Rev 2

4.17

SDRAM Interface Timing

4.17.1

SDRAM Interface Input Timings

Table 51. SDRAM Input Timings

Figure 25. SDRAM Input Timings

4.17.2

SDRAM Interface Output Timings

Table 52. SDRAM Output Timings

Symbol

Parameter

Timing

Unit

Cload

[pF]

Min

Max

Clock frequency

166

MHz

tISU

Input setup time

0.3

tIH

Input hold time

1.5

tIH

tpp = 1/Fc

50% VDD

tISU

SDRAM_FBCLK

SDRAM DATA

invalid

Symbol

Parameter

Timing

Unit

Cload

[pF]

Min

Max

Clock frequency

166

MHz

tDO

Data output delay@166MHZ(1)

3.6

tHO

Data hold time

1. Internally data is launched at the negative edge of the clock. The output delay can be expressed as 1/Fc*0.55+.3. The

multiplication factor 0f 0.55 is used to represent the duty cycle variation of the clock due to IO pads. 0.3 ns is the data travel

time from the flop to the IO pad. At 112 MHz the max data output delay is 5.19 ns.

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