전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

MSP430 데이터시트(PDF) 35 Page - Texas Instruments

부품명 MSP430
상세설명  MSP430G2x33, MSP430G2x03 Mixed-Signal Microcontrollers
PDF  96 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

MSP430 데이터시트(HTML) 35 Page - Texas Instruments

Back Button MSP430 Datasheet HTML 31Page - Texas Instruments MSP430 Datasheet HTML 32Page - Texas Instruments MSP430 Datasheet HTML 33Page - Texas Instruments MSP430 Datasheet HTML 34Page - Texas Instruments MSP430 Datasheet HTML 35Page - Texas Instruments MSP430 Datasheet HTML 36Page - Texas Instruments MSP430 Datasheet HTML 37Page - Texas Instruments MSP430 Datasheet HTML 38Page - Texas Instruments MSP430 Datasheet HTML 39Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 35 / 96 page
background image
35
MSP430G2533, MSP430G2433, MSP430G2333, MSP430G2233
MSP430G2403, MSP430G2303, MSP430G2203
www.ti.com
SLAS734G – APRIL 2011 – REVISED APRIL 2016
Submit Documentation Feedback
Product Folder Links: MSP430G2533 MSP430G2433 MSP430G2333 MSP430G2233 MSP430G2403 MSP430G2303
MSP430G2203
Specifications
Copyright © 2011–2016, Texas Instruments Incorporated
(1)
This parameter defines the minimum supply voltage VCC when the data in RAM remains unchanged. No program execution should
happen during this supply voltage condition.
5.36 RAM
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V(RAMh)
RAM retention supply voltage (1)
CPU halted
1.6
V
(1)
Tools that access the Spy-Bi-Wire interface must wait for the maximum tSBW,En time after pulling the TEST/SBWCLK pin high before
applying the first SBWCLK clock edge.
(2)
fTCK may be restricted to meet the timing requirements of the module selected.
5.37 JTAG and Spy-Bi-Wire Interface
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
VCC
MIN
TYP
MAX
UNIT
fSBW
Spy-Bi-Wire input frequency
2.2 V
0
20
MHz
tSBW,Low
Spy-Bi-Wire low clock pulse duration
2.2 V
0.025
15
µs
tSBW,En
Spy-Bi-Wire enable time
(TEST high to acceptance of first clock edge(1))
2.2 V
1
µs
tSBW,Ret
Spy-Bi-Wire return to normal operation time
2.2 V
15
100
µs
fTCK
TCK input frequency(2)
2.2 V
0
5
MHz
RInternal
Internal pulldown resistance on TEST
2.2 V
25
60
90
k
Ω
(1)
After the fuse is blown, no further access to the JTAG/Test, Spy-Bi-Wire, and emulation features is possible, and JTAG is switched to
bypass mode.
5.38 JTAG Fuse
(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VCC(FB)
Supply voltage during fuse-blow condition
TA = 25°C
2.5
V
VFB
Voltage level on TEST for fuse blow
6
7
V
IFB
Supply current into TEST during fuse blow
100
mA
tFB
Time to blow fuse
1
ms



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com