16

Integrated

Circuit

Systems, Inc.

ICS932S422C

1412A—12/10/07

SMBus Table: CPU Programmable Output Divider Register

Pin #

Name

Control Function

Type

0

1

PWD

Bit 7

CPUDiv3

RW

X

Bit 6

CPUDiv2

RW

X

Bit 5

CPUDiv1

RW

X

Bit 4

CPUDiv0

RW

X

Bit 3

X

Bit 2

X

Bit 1

X

Bit 0

X

SMBus Table: SRC and PCI Programmable Output Divider Register

Pin #

Name

Control Function

Type

0

1

PWD

Bit 7

PCIDiv3

RW

X

Bit 6

PCIDiv2

RW

X

Bit 5

PCIDiv1

RW

X

Bit 4

PCIDiv0

RW

X

Bit 3

SRC_Div3

RW

X

Bit 2

SRC_Div2

RW

X

Bit 1

SRC_Div1

RW

X

Bit 0

SRC_Div0

RW

X

SMBusTable: Test Byte Register

Test

Type

PWD

Bit 7

RW

0

Bit 6

RW

0

Bit 5

RW

0

Bit 4

RW

0

Bit 3

RW

0

Bit 2

RW

0

Bit 1

RW

0

Bit 0

RW

0

Note: Do NOT write to Bit 21. Erratic device operation will result!

-

-

Byte 19

Byte 20

See CPU, SRC and PCI

Divider Ratios Table

See CPU, SRC and PCI

Divider Ratios Table

RESERVED

RESERVED

RESERVED

RESERVED

CPU Divider Ratio

Programming Bits

-

ICS ONLY TEST

Reserved

-

ICS ONLY TEST

Reserved

-

ICS ONLY TEST

Reserved

-

ICS ONLY TEST

Reserved

-

ICS ONLY TEST

Reserved

-

ICS ONLY TEST

Reserved

-

ICS ONLY TEST

Reserved

Test Function

Test Result

-

ICS ONLY TEST

Reserved

Byte 21

-

SRC_ Divider Ratio

Programming Bits

-

-

-

-

PCI Divider Ratio

Programming Bits

-

-

-

-

See CPU, SRC and PCI

Divider Ratios Table

-