L99PM72GXP datasheet(31/129 Pages) STMICROELECTRONICS

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L99PM72GXP

Detailed description

128

2.6

Reset output (NRESET)

If V1 is turned on and the voltage exceeds the V1 reset threshold, the reset output

“NRESET” is pulled up by internal pull up resistor to V1 voltage after a reset delay time (trd).

This is necessary for a defined start of the micro controller when the application is switched

on. Since the NRESET output is realized as an open drain output it is also possible to

connect an external NRESET open drain NRESET source to the output. As soon as the

NRESET is released by the L99PM72 the Watchdog timing starts with a long open window.

A reset pulse is generated in case of:

•

V1 drops below VRTH (configurable by SPI) for t > tUV1

•

watchdog failure

•

turn-on of the V1 regulator (VS power-on or wake-up from Vbat_standby mode)

2.7

Operational amplifiers

The operational amplifiers are especially designed to be used for sensing and amplifying the

voltage drop across ground connected shunt resistors. Therefore the input common mode

range includes -0.2 V to 3V.

The operational amplifiers are designed for -0.2 V to 3 V input voltage swing and rail-to-rail

output voltage range.

All pins (positive, negative and outputs) are available to be able to operate in non-inverting

and inverting mode. Both operational amplifiers are on-chip compensated for stability over

the whole operating range within the defined load impedance.

The Operational Amplifiers may also be used to setup an additional high current voltage

source with an external pass element. Refer to Section 2.1.3 for a detailed description.

Table 7. Persisting fail safe conditions and exit modes

Failure source Failure condition

Diagnosis

Exit from Fail_safe Mode

µC (oscillator)

15 consecutive

watchdog failures

Fail_safe = 1;

Forced_Sleep_WD = 1

Wake-up

TRIG = 1 during LOWi

Read & Clear SR3

short at turn-on

Fail_safe = 1;

Forced_Sleep_TSD2_SHTV1 = 1

Read & Clear SR3 after

wake-up

Temperature

7 times TSD2

Fail_safe = 1; TW = 1; TSD1 = 1;

TSD2 = 1;

Forced_Sleep_TSD2_SHTV1=1

Read & Clear SR3 after

wake-up

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