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PM8805 데이터시트(PDF) 24 Page - STMicroelectronics

부품명 PM8805
상세설명  IEEE 802.3bt PoE-PD interface with embedded dual active bridge
PDF  45 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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PM8805 데이터시트(HTML) 24 Page - STMicroelectronics

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DS12813 Rev 1
4.7
Hot swap, CTRL and PGD pins
Above UVLO threshold, when the internal charge pump is turned on, an internal current
source is used to charge the output capacitor (e.g. the input capacitor of the DC/DC
converter) in order to control the inrush current.
The internal current source is only active during the charge phase of the output capacitance,
with a 25 mA typ. current when (VOB-VOUT) = 55 V or more, which linearly increases up to
140 mA when the voltage across the hot swap MOSFET falls below 7 V.
Note that the internal current source is not capable of sustaining any extra load applied on
VOUT (such as a PWM controller quiescent current), since its only purpose is the charge of
Cout. The load can be applied only after the complete charge of the output capacitor (i.e.
when PGD signal is asserted).
It is recommended to limit the maximum quiescent current used as a load on VOUT before
PGD assertion to 10 mA (Iload_inrush). The more current used to bias output loads, the
slower the inrush phase is.
A simplified formula for the current is:
Equation 1
A simplified formula for the average current is:
Table 9. PD main parameters table
PD
type
Class
CLS1
sign.
CLS2
sign.
Pin
(W)
Vin min.
(V)
Vin max.
(V)
Iin max.
(mA)
Ppeak
( W )
for 50ms
1
0
0
0
13.0
37.0
57
350
14.4
1
1
1
3.84
42.1
90
5.00
2
2
2
6.49
40.8
160
8.36
3
3
3
13.0
37.0
350
14.4
2
4
4
4
25.5
42.5
600
28.05
3
1
1
1
3.84
42.1
90
5.00
2
2
2
6.49
40.8
160
8.36
3
3
3
13.0
37.0
350
14.4
4
4
4
25.5
42.5
600
28.05
5
4
0
40.0
44.3
900
42
6
4
1
51.0
42.5
1200
53.55
4
7
4
2
62.0
42.9
1440
65.10
8
4
3
71.3
41.2
1730
74.86
I = (25mA-Iload_inrush) + 2.4[mA/V] * [55 - (VOB - VOUT)]



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