IS25LE01G-RILA3-TY datasheet(23/186 Pages) ISSI

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IS25LE01G-RILA3-TY 데이터시트(PDF) 23 Page - Integrated Silicon Solution, Inc

부품명	IS25LE01G-RILA3-TY

상세설명	SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	186 Pages

Scroll/Zoom	100%

제조업체	ISSI [Integrated Silicon Solution, Inc]

홈페이지	http://www.issi.com

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23 / 186 page

IS25LE01G

IS25WE01G

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A6

01/14/2025

WEL bit: Write Enable Latch (WEL) bit indicates the status of the internal write enable latch. When WEL bit

is “0”,

the internal write enable latch is disabled and the Write operations described in Table 6.3 are inhibited. When WEL

bit

is “1”, the Write operations are allowed. WEL bit is set by a Write Enable (WREN, 06h) instruction. Most of Write

Non-Volatile/Volatile Register, Program and Erase instruction must be preceded by a WREN instruction.

WEL bit can be reset by a Write Disable (WRDI) instruction. It will automatically reset after the completion of any

Write Non-Volatile Register, Program and Erase operation.

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