6

TPS62840

SLVSEC6D – JUNE 2019 – REVISED MARCH 2020

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(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2)

All voltage values are with respect to network ground terminal GND.

(3)

While switching.

7 Specifications

7.1 Absolute Maximum Ratings

(1)

MIN

MAX

UNIT

Pin voltage(2)

VIN

–0.3

7

V

SW (DC)

–0.3

VIN + 0.3

V

SW (AC), less than 10ns(3)

–2.0

8.5

V

EN, MODE, STOP

–0.3

6.5

V

VSET

–0.3

VIN + 0.3 < 3.6

V

VOS

–0.3

3.7

V

Operating junction temperature, TJ

–40

150

°C

Storage temperature, Tstg

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body

model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)

±2000

V

Charged device model (CDM), per JEDEC specification JESD22-C101, all

pins(2)

±500

7.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

VIN

Supply voltage VIN

1.8

6.5

V

L

Effective inductance

1.51

2.2

2.9

µH

COUT

Effective output capacitance

3

10

40

µF

CIN

Effective input capacitance

1

4.7

µF

CVSET

External parasitic capacitance at VSET pin

100

pF

RSET

Nominal resistance range for external voltage selection resistor (E96 resistor series)

0.909

267

k

Ω

External voltage selection resistor tolerance

1%

External voltage selection resistor temperature coefficient

±200 ppm/°C

TJ

Operating junction temperature range

-40

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.4 Thermal Information

THERMAL METRIC(1)

8 Pins DLC

Package

6 Pins YBG

Package

8 Pins DGR

Package

DGR EVM

UNIT

JEDEC PCB 51-7

JEDEC PCB 51-5

TPS62841-2EVM123

RθJA

Junction-to-ambient thermal resistance

105.6

133.4

54.4

46.9

°C/W

RθJC(top) Junction-to-case (top) thermal resistance

75.7

0.4

58.1

N/A

°C/W

RθJB

Junction-to-board thermal resistance

31.9

39.4

25.9

N/A

°C/W

ψJT

Junction-to-top characterization parameter

2.3

0.1

1.2

0.9

°C/W

ψJB

Junction-to-board characterization parameter

31.5

39.4

25.9

17.4

°C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance

n/a

n/a

11.7

N/A

°C/W