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TPS62840

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SLVSEC6D – JUNE 2019 – REVISED MARCH 2020

Product Folder Links: TPS62840

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Copyright © 2019–2020, Texas Instruments Incorporated

Feature Description (continued)

Once the output voltage is set, the R2D converter is turned off to avoid current flowing through RSET. Care must

be taken that no parasitic current, capacitance, or both greater than 100 pF is present between the VSET and

GND pins. This can cause false RSET readings and a faulty output voltage to be set. The R2D converter is

designed to operate with resistor values out of E96 series. Table 1 shows the allowed RSET values.

Table 1. Output Voltage Setting, RSET Resistor

OUTPUT VOLTAGE SETTING VOUT [V]

VSET RESISTANCE TO GND - E96 VALUES [Ω]

TPS62841YBG

TPS62840YBG

TPS62842DGR

MIN

NOM

MAX

TPS62841DLC

TPS62840DLC

TPS62841DGR

0.8

1.8

1.8

0

GND

0.01 k

0.85

1.9

2.0

0.87 k

0.909 k

0.95 k

0.9

2.0

2.2

1.67 k

1.74 k

1.81 k

0.95

2.1

2.4

2.76 k

2.87 k

2.98 k

1.0

2.2

2.5

4.15 k

4.32 k

4.49 k

1.05

2.3

2.6

5.80 k

6.04 k

6.28 k

1.1

2.4

2.7

8.11 k

8.45 k

8.79 k

1.15

2.5

2.8

11.04 k

11.5 k

11.96 k

1.2

2.6

2.9

15.17 k

15.8 k

16.43 k

1.25

2.7

3.0

20.64 k

21.5 k

22.36 k

1.3

2.8

3.1

27.55 k

28.7 k

29.85 k

1.35

2.9

3.2

36.77 k

38.3 k

39.83 k

1.4

3.0

3.3

50.21 k

52.3 k

54.39 k

1.45

3.1

3.4

68.64 k

71.5 k

74.36 k

1.5

3.2

3.49

97.92 k

102 k

106.08 k

1.55

3.3

3.6

256.32 k

267 k

277.68 k

The output voltage of the TPS62849 is internally set to 3.4 V. Connect VSET directly to GND for this device.

8.3.5 Undervoltage Lockout UVLO

To avoid mis-operation of the device at low input voltages, an undervoltage lockout (UVLO) comparator monitors

the supply voltage. The UVLO comparator shuts down the device at an input below the threshold VTH_UVLO– with

falling VIN. The device starts at an input voltage higher than the threshold VTH_UVLO+ with rising VIN.

When the device resumes operation from an undervoltage lockout condition, it behaves like being enabled. This

means the internal control logic is powered up, the external RSET resistor is read out and a soft-start sequence is

initiated.